SPARC Architecture Online Reference Manual


A trap is a vectored control transfer to privileged software through a trap table that may contain the first eight instructions of each trap handler.

The base address of the trap table is kept in the %tba - trap base register.

A trap causes the current PC and nPC and some other registers to be saved.

A trap may be caused by a Tcc instruction, an asynchronous exception, an instruction-induced exception, or an interrupt request.

ta0 ta1 ta2 ta3 ta4 ta6

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